STM32F102CBT6

en.CD00210831.pdf

Features

Core: Arm® 32-bit Cortex®-M3 CPU – 48 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 WS memory access – Single-cycle multiplication and hardware division 

• Memories – 64 or 128 Kbytes of Flash memory – 10 or 16 Kbytes of SRAM 

• Clock, reset and supply management – 2.0 to 3.6 V application supply and I/Os – POR, PDR and programmable voltage detector (PVD) – 4-to-16 MHz crystal oscillator – Internal 8 MHz factory-trimmed RC – Internal 40 kHz RC – PLL for CPU clock – 32 kHz oscillator for RTC with calibration 

• Low power – Sleep, Stop and Standby modes – VBAT supply for RTC and backup registers 

• Debug mode – Serial wire debug (SWD) and JTAG interfaces 

• DMA – 7-channel DMA controller – Peripherals supported: timers, ADC, SPIs, I 2Cs and USARTs 

• 1 × 12-bit, 1.2 µs A/D converter (up to 16 channels) – Conversion range: 0 to 3.6 V – Temperature sensor 

• Up to 51 fast I/O ports – 37/51 I/Os all mappable on 16 external interrupt vectors and almost all 5 V-tolerant

• Up to six timers – Three 16-bit timers, each with up to four IC/OC/PWM or pulse counter – Two watchdog timers (Independent and Window) – SysTick timer: 24-bit downcounter 

• Up to eight communication interfaces – Up to two I2C interfaces (SMBus/PMBus) – Up to three USARTs (ISO 7816 interface, LIN, IrDA capability, modem control) – Up to two SPIs (12 Mbit/s) – One USB 2.0 full speed interface 

• CRC calculation unit, 96-bit unique ID 

• ECOPACK packages